We founded Architect because chip tools still follow a core workflow that has barely changed in decades. AI can change it.
Chip physical design contains decades of specialist knowledge held by a relatively small group of engineers. The tools that capture it are powerful, but manual: each DRC run creates a report, and someone must read it, classify violations, choose what to fix or route around, then make the changes by hand.
We believe a well-designed AI agent can reliably classify, prioritize, and execute routine violations. That does not mean all of physical design, or creative choices around floorplanning and power intent. It means the mechanical loop after layout is complete.
Architect automates that loop. The Layout Agent drives P&R. The Verify Agent reads rule deck output and adds root cause context to each violation. The Refine Agent closes what it can and escalates the rest, giving engineers enough context to act immediately instead of rerunning the entire check chain.
Ebrahim's career spans embedded systems and hardware-software co-design, with a focus on product strategy for tools connecting RTL to physical implementation. He co-founded Architect to bring that focus to violation closure, where AI automation can deliver an immediate, measurable effect.
James brings deep experience in physical design flow development, place-and-route internals, and formal verification. His work creating production EDA tools across CMOS process generations shapes the agent architecture and the structured handoffs that coordinate Architect's three agents around shared design state.
Priya has managed technical programs for hardware tape-outs, translating chip team needs into actionable tooling feedback across foundry relationships and design schedules. She leads onboarding and works directly with each early-access team through its first Architect-assisted tape-out.
Every Refine Agent escalation carries complete diagnostic context, not only the violation. An engineer who understands the cause can make a better decision than one simply given a fix.
Each automated change to a DEF or SDC file records the before-and-after state, triggering violation identifier, and authorizing agent classification. No design change happens silently.
Early access is intentionally limited. We work through actual tape-outs, not sanitized benchmark designs. This discipline keeps us honest about what the agents can and cannot handle.
Architect focuses on one narrow problem: physical design automation in the RTL-to-GDS flow. We are not building a horizontal AI platform or targeting every EDA vertical. We work with chip teams on real tape-outs, earning confidence by closing DRC violations on actual designs.
Architect, Inc. is based in San Jose, California, and incorporated in Delaware.
Request early access to try Architect, or contact us directly about joining the team.